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Use an F-RAM to Build Battery-Powered Devices with Ultra-Low-Power Long-Term Storage

By Stephen Evanczuk

Contributed By Digi-Key's North American Editors

Reliable long-term data storage has emerged as an increasingly vital requirement in mobile battery-powered devices designed for consumer, industrial, and other segments. Conventional non-volatile memory (NVM) technologies such as flash memory or electrically erasable programmable read-only memory (EEPROM) have served this need in earlier product generations.

For today's advanced mobile products, however, users' continued expectations for extended battery life have significantly limited the options able to deliver reliable storage without compromising design performance or power budgets.

This article introduces the Cypress Semiconductor Excelon ferroelectric random-access memory (F-RAM) family and shows how it can be used to meet requirements for reliable long-term storage in battery-powered devices.

Storage challenges in portable devices

In designs for wearables, IoT devices, and other portable products, the need for large non-volatile storage directly follows the increased capabilities of these products. Users' desire for more comprehensive information has driven the integration in these designs of more types of sensors operating at higher resolutions and faster update rates. At the same time, users expect these sophisticated products to provide an extensive view of historical data and trends rather than a simple snapshot of current sensor data. In particular, the device must be able to produce this catalog of data on demand without an active connection to the cloud, smartphone, or other external device.

Designers trying to meet these basic requirements with conventional NVM technologies face multiple difficulties, particularly in power limited designs. Write times for many NVM technologies are inherently much slower than RAM because of the need for the extended cycles required to complete the programming process. Conventional EEPROM can exhibit write times of several milliseconds. Even in advanced flash memory, performance is slowed by the need for the extra "soak time" required during write cycles. In turn, longer write cycles mean increased overall current consumption, along with reduced data update rate. Finally, conventional NVM devices typically have limited write endurance specifications. If used with the repeated write cycles required for routine data storage, the devices could wear out within the lifetime of the product.

For a growing array of battery-powered designs, F-RAM NVM devices provide a simpler solution for long term storage that delivers the required combination of speed, endurance, and low-power operation. Typical F-RAM devices feature write endurance and write cycle times that are orders of magnitude better than EEPROM and flash memory, and even approach static RAM (SRAM) in speed. In effect, F-RAM combines the performance advantages of conventional RAM with the non-volatile storage capability of other NVM technologies. Among F-RAM solutions, the Cypress Semiconductor Excelon LP (low-power) F-FRAM series goes further with its ability to meet the fundamental requirement for ultra-low-power consumption in battery-powered wearables and other mobile products.

Ultra-low-power F-RAM

Cypress Excelon LP F-RAM devices are integrated non-volatile memory subsystems that combine an F-FRAM array, registers, control and interface logic, and a special sector designed to preserve contents through up to three standard reflow soldering cycles (Figure 1).

Diagram of Cypress Semiconductor Excelon LP F-RAM devicesFigure 1: Cypress Semiconductor Excelon LP F-RAM devices integrate an F-RAM array and supporting circuitry to provide a complete memory subsystem accessible through standard SPI ports. (Image source: Cypress Semiconductor)

Excelon LP F-FRAM devices provide a level of long-term reliability that far surpasses typical EEPROM or flash memory. These devices exhibit endurance of 1015 read/write cycles and data retention of 151 years, exceeding the realistic life cycle of any practical wearable or IoT device.

The write performance of these devices also enhances the overall reliability of applications. Because these devices write data to the non-volatile F-RAM array at bus speed, they greatly reduce the chance of lost data compared to other types of NVM devices. In those devices, the significantly longer write times and corresponding need to buffer data internally create a large window of vulnerability where data could be lost if power fails before the write sequence finishes.

Unlike other NVM technologies, Excelon LP F-FRAM devices operate at the minimal current levels needed to extend battery life in portable products. Operating at 20 megahertz (MHz), the Cypress CY15x108QI 8 megabit (Mb) F-RAM LP series consumes only 1.3 milliamps (mA) while the Cypress CY15x104QI 4 Mb F-RAM LP series consumes only 1.2 mA. As discussed below in more detail, the devices also provide developers with multiple options for achieving further reductions in current consumption.

Designed to support a wide set of system requirements, members of the Excelon LP family are available in both commercial and industrial temperature ranges as well as different supply voltages. For example, the 4 Mb CY15V104QI and 8 Mb CY15V108QI operate with a supply voltage ranging from 1.71 volts to 1.89 volts, while the 4 Mb CY15B104QI and 8 Mb CY15B108QI are designed to operate with a 1.8 volt to 3.6 volt supply.

Simple system design

Besides ensuring a suitable match with the operational requirements of different applications, the devices simplify system design. In a typical design, developers would use a Serial Peripheral Interface (SPI) bus to connect one or more Excelon LP F-RAM devices as SPI slaves to a SPI master such as a microcontroller (Figure 2).

Diagram of Cypress Semiconductor Excelon LP F-RAM devicesFigure 2: Developers can add long-term storage to their designs simply by connecting one or more Cypress Semiconductor Excelon LP F-RAM devices to the SPI bus controlled by a SPI master such as a microcontroller. (Image source: Cypress Semiconductor)

Transactions across the interconnecting SPI bus are simple and fast. When writing to memory, the Excelon LP F-RAM devices operate without the additional write delays noted earlier for flash or EEPROM technologies. Instead, as each byte reaches the device through the SPI bus, it is written immediately to the F-RAM array, significantly reducing the risk of lost data due to sudden power failure.

For the system developer, the write process follows a simple SPI protocol involving industry standard SPI operation codes (opcodes). The host processor begins each write sequence by transmitting a write enable (WREN) opcode (06h) while raising then lowering the chip select (ØCS) line. After this brief initialization phase, the host processor begins the write operation by transmitting a write opcode (02h) followed by a 24-bit address. (The upper four bits of the address are ignored in these devices but ensure compatibility with future higher density F-RAM devices.) Immediately after sending the address, the host processor can begin transferring data bytes (Figure 3).

Diagram of Cypress Semiconductor Excelon LP F-RAM devices during SPI write sequenceFigure 3: During the standard SPI write sequence, Cypress Semiconductor Excelon LP F-RAM devices immediately write data to the F-RAM array without any buffer or soak time delays associated with earlier NVM technologies. (Image source: Cypress Semiconductor)

As the host processor sends a data byte, the F-RAM device automatically increments the address internally as long as the host processor keeps the ØCS line low and continues to transmit clock signals. As a result, designers can use Excelon LP F-RAM devices in designs that require any combination of single byte writes and block writes.

Read operations follow a similar SPI protocol. After lowering ØCS, the host processor transmits a read opcode (03h) and the 24-bit address. The Excelon LP F-RAM device immediately responds by transmitting the data bytes on the SO line with each SCK clock cycle. Like write operations, read operations continue as long as the host processor holds ØCS low and continues to issue SCK clocks.

Extending battery life

Along with their simple system design requirements, these low-power F-RAMs provide developers with options for reducing current consumption and extending battery life. Specifically designed for battery-powered applications, Cypress CY15x10xQI devices integrate built-in inrush current control circuits that reduce the relatively large currents typically generated while powering up NVM devices.

The Cypress Excelon LP F-RAM devices also let developers employ different strategies to extend battery life in wearable and IoT designs that use sensors to track the relatively slow progress of real-world events. In those designs, the Cypress Excelon LP F-RAM devices can typically be operated at a lower clock frequency that reduces current consumption. For example, while operating with a 1 MHz clock, the current consumption of the 8 Mb CY15V108QI drops to 300 microamps (µA) from the 1.3 mA used at 20 MHz. Similarly, the 4 Mb CY15V104QI requires only 200 µA at 1 MHz compared to 1.2 mA at 20 MHz.

Using special low-power modes available with Excelon LP F-RAM devices, developers can further minimize system power consumption during the varying idle periods that routinely occur in wearable and IoT applications. These F-RAM devices support three reduced power modes that allow developers to trade response time for reduced current consumption.

The devices automatically enter the first low-power mode, standby mode, whenever ØCS is raised to terminate an SPI sequence. Conversely, the devices automatically exit standby mode when ØCS is lowered to begin a new SPI sequence. While in standby mode, the 8 Mb CY15V108QI Excelon LP F-RAM consumes only 3.5 µA and the 4 Mb CY15V104QI requires only 2.3 µA.

Standby mode provides immediate, automatic current reduction without imposing additional delays to return to normal active mode. For applications with extended idle periods, however, even this current consumption needlessly reduces battery life over the long term. For these cases, Excelon LP F-RAM devices provide two additional low-power modes: deep power down mode and hibernate mode.

Unlike the default standby mode, deep power down and hibernate modes are explicitly entered through the use of special SPI opcodes. Similar to read and write SPI operations, the SPI master issues a deep power down (DPD) opcode (BAh) or hibernate (HBN) opcode (B9h) to command the F-RAM device to enter the corresponding low-power mode (Figure 4).

Diagram of deep power down (DPD) or hibernate modes (HIB)Figure 4: Developers can use standard SPI protocols to place Cypress Semiconductor Excelon LP F-RAM devices into deep power down (DPD) or hibernate modes (HIB) that dramatically reduce current consumption but incur different delays to enter (tENTxxx) and exit (tEXTxxx) the respective low-power mode. (Image source: Cypress Semiconductor)

The effect of these low-power modes is dramatic with current consumption falling below 1 µA (Table 1). Although they significantly reduce device current, these modes come with a compromise that can impact time-sensitive data operations. The opcode-based DPD and HIB low-power modes impose additional delays associated with the time required to enter the mode (tENTDPD or tENTHIB) and the time required to exit the mode (tEXTDPD or tEXTHIB) (Table 1 & Figure 4).

Device Active mode current Standby mode current Deep power-down (DPD) mode current and delays Hibernate (HIB) mode current and delays
CY15V104QI 1.2 mA (20 MHz)
200 μA (1 MHz)
2.3 μA (25°C) 0.7 μA (25°C)
tENTDPD: 3 μs
tEXTDPD: 150 μs
0.1 μA (25°C)
tENTHIB: 3 μs
tEXTHIB: 5 μs
CY15V108QI 1.3 mA (20 MHz)
300 μA (1 MHz)
3.5 μA (25°C) 0.9 μA (25°C)
tENTDPD: 3 μs
tEXTDPD: 240 μs
0.1 μA (25°C)
tENTHIB: 3 μs
tEXTHIB: 5 μs

Table 1: Current consumption in Excelon LP F-RAM power modes along with associated delays to enter (tENTDPD or tENTHIB) or exit (tEXTDPD or tEXTHIB) opcode-based deep power down and hibernate modes. Numbers relate to commercial low-voltage versions with 1.71 volt to 1.89 volt supply range and operating temperature range of 0°C to +70°C. (Data source: Cypress Excelon LP F-RAM datasheets)

In using the opcode-based low-power modes, developers need to balance the benefits of reduced current consumption in these modes against current consumed and time required to enter and exit them. Any system that enters extended idle periods is a likely candidate for either mode, but the specific choice of mode depends critically on the duty cycle expected for F-RAM device operations during active periods. For F-RAM devices that need to operate with a high duty cycle, the costs of repeatedly entering and exiting a low-power mode could be counterproductive. For example, Cypress suggests that any application with an idle period of 10 seconds or more is an excellent candidate for hibernate mode.

Conclusion

An emerging need for long-term data storage in battery-powered wearables and IoT devices leaves developers searching for NVM devices that offer low-power consumption without the performance limitations associated with conventional NVM technologies such as EEPROM and flash memory. Building on the inherent speed and reliability of F-RAM technology, Cypress Semiconductor Excelon low-power (LP) F-RAM devices combine their inherent reduced current requirements with programmable low-power modes that can bring their current consumption down to less than one microamp. Using Cypress Excelon LP F-FRAMs, developers can quickly supplement battery-powered designs with long-term data storage that offers the speed of conventional random access memory and the ability to reliably retain data for over 150 years.

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About this author

Stephen Evanczuk

Stephen Evanczuk has more than 20 years of experience writing for and about the electronics industry on a wide range of topics including hardware, software, systems, and applications including the IoT. He received his Ph.D. in neuroscience on neuronal networks and worked in the aerospace industry on massively distributed secure systems and algorithm acceleration methods. Currently, when he's not writing articles on technology and engineering, he's working on applications of deep learning to recognition and recommendation systems.

About this publisher

Digi-Key's North American Editors